1. Field of the Invention
The present invention relates to a flash memory device and programming and erasing methods therewith, and more particularly, to a flash memory device and programming and erasing methods therewith, to secure the programming and erasing characteristics by changing a structure of a floating gate.
2. Discussion of the Related Art
Among semiconductor memory devices, a non-volatile memory device is an optimal device in that it is possible for a user to program data with easiness by switching a memory state in an electrical method, and also, it is possible to maintain the memory state of data even if a power is switched off.
On the fabrication process, the non-volatile memory device is largely classified into a floating gate type and an MIS (Metal-Insulator-Semiconductor) type, wherein the MIS type is formed of two or three dielectric layers.
The floating gate type non-volatile memory device realizes the memory characteristics by using a potential well. In detail, an ETOX (EPROM Tunnel Oxide) structure of EEPROM (Electrically Erasable & Programmable & Programmable Read Only Memory) is one of the most representative floating gate type non-volatile memory devices.
Meanwhile, the MIS type non-volatile memory device performs a memory function by using traps remaining in dielectric layer, bulk, dielectric layer-interface of dielectric layer, and dielectric layer-interface of semiconductor.
Programming and erasing methods of a floating gate type non-volatile memory device will be described with reference to the accompanying drawings.
FIG. 1 shows a cross sectional view of a memory device having an ETOX structure among floating gate type non-volatile memory devices according to the related art.
In a related art flash memory device, as shown in FIG. 1, a tunnel oxide layer 102, a floating gate 103, a dielectric layer 104 and a control gate 105 are sequentially deposited on a p-type semiconductor substrate 101. At this time, a source region S and a drain region D are formed in the surface of the p-type semiconductor substrate 101 at both sides of the deposited structure.
Programming and erasing methods of the floating gate type non-volatile memory device will be described as follows.
On the programming method, electrons are injected to a potential well formed in the floating gate, whereby a threshold voltage increases. On the erasing method, holes are injected to the potential well, whereby the holes are recombined with the electrons, thereby lowering the threshold voltage.
At this time, the electrons and the holes are generally injected in a hot electron injection method and a hot hole injection method. On erasing, in case of using an F-N (Fowler-Nordheim) tunneling instead of the hot hole injection method, it has the disadvantageous characteristics such as low erasing-speed. In this respect, the hot hole injection method is most generally used.
However, the related art programming and erasing methods have the following disadvantages.
On programming and erasing, the hot electron injection method and the hot hole injection method are generally used, whereby trap sites generate in the interface between the tunnel oxide layer and the semiconductor substrate, or the inside of the tunnel oxide layer, or the interface between the tunnel oxide layer and the floating gate. As a result, it is impossible to maintain the constant threshold voltage due to the trap sites. Also, the electrons or the holes stored in the floating gate are discharged through the trap sites.